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STRUCTURE PRODUCT SERIES TYPE FEATURES
Silicon Monolithic Integrated Circuit Single-Phase Full-Wave Motor Driver for Fan Motor
Speed controllable by DC / PWM input Current limit circuit PWM soft switching drive
ABSOLUTE MAXIMUM RATINGS Parameter Symbol Limit 20 Supply voltage Vcc 812.5 Power dissipation Pd -40+100 Operating temperature Topr -55+150 Storage temperature Tstg 34 High side output voltage VOH 34 Low side output voltage VOL 1.5 Low side output current Iomax 10 Signal output current IFG/IAL 20 Signal output voltage VFG/VAL 8 VREF current ability IVREF 15 VTH input voltage VVTH 150 Junction temperature Tjmax Reduce by 6.5mW/ over Ta=25. (On 70.0mmx70.0mmx1.6mm glass epoxy board) This value is not to exceed Pd. OPERATING CONDITIONS Parameter Operating supply voltage range Hall input voltage range VMIN input voltage range Symbol Vcc VH VVMIN Limit 4.517.0 0Vcc-2.0 0Vcc-2.0 Unit V V V Unit V mW V V A mA V mA V
This product is not designed for production against radioactive rays. This document may be strategic data subject to COCOM regulations.
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ELECTRICAL CHARACTERISTICS (Unless otherwise specified Ta=25,Vcc=12V) Limit Parameter Symbol Unit Min. Typ. Max. Circuit current Icc 5.0 8.0 11.0 mA Hall input hysteresis VHYS 5 10 15 mV High side output current 15 IH 5 10 mA High side output leak current Low side output voltage Lock detection ON time Lock detection OFF time FG output low voltage FG output leak current AL output low voltage AL output leak current OSC low voltage OSC high voltage OSC charge current OSC discharge current Output ON duty 1 IHL VL TON TOFF VFGL IFGL VALL IALL VOSCL VOSCH ICOSC IDOSC DUTY1 0.18 3.6 0.8 2.24 -50 26 75 0.3 0.3 6.0 0.15 0.15 1.0 2.44 -32 32 80 10 0.45 0.42 8.4 0.3 10 0.3 10 1.2 2.64 -26 50 85 A V s s V A V A V V A A %
Conditions
VOH=34V Io=600mA
IFG=5mA VFG=17V IAL=5mA VAL=17V
Output ON duty 2
DUTY2
45
50
55
%
Output ON duty 3 VREF voltage Current limit voltage VTH bias current VMIN bias current
DUTY3 VREF VCL IVTH IVMIN
15 2.8 320 -
20 3.0 350 -
25 3.2 380 0.2 0.2
% V mV A A
VTH=VREF*0.429 H side pull up R=1k COSC=470pF VTH=VREF*0.573 H side pull up R=1k COSC=470pF VTH=VREF*0.717 H side pull up R=1k COSC=470pF IVREF=-2mA
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PACKAGE OUTLINES
6.60.2
6.20.3 1.50.1 4.40.2 0.11
BD6722
1
8
Lot No.
0.150.1 0.1
0.8
0.360.1
SSOP-A16 (UNIT:mm)
BLOCK DIAGRAM
0.3Min.
16
9
TERMINAL NAME
GND 1 COSC 2 VMIN 3 VTH 4 Vcc 5
COSC SOFT START SOFT SWITCH
VREF
SIGNAL OUTPUT
AL 16 FG 15 VREF 14 H13
PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TSD
+
+
VMIN PWMCOMP VTH PWMCOMP
LOCK PROTECTION
CONTROL LOGIC
PRE DRIVER HALL COMP
+
CURRENT LIMIT COMP
H+ 12 CS 11 A2H 10
A1H 6 A1L 7 RNF 8
POW POW
+
-
A2L 9
Terminal name GND COSC VMIN VTH Vcc A1H A1L RNF A2L A2H CS H+ HVREF FG AL
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CAUTIONS ON USE
1) Absolute maximum ratings An excess in the absolute maximum rations, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. 3) Power supply line Back electromotive force causes regenerated current to power supply line, therefore take a measure such as placing a capacitor between power supply and GND for routing regenerated current. And fully ensure that the capacitor characteristics have no problem before determine a capacitor value. (when applying electrolytic capacitors, capacitance characteristic values are reduced at low temperatures) 4) GND potential The potential of GND pin must be minimum potential in all operating conditions. Also ensure that all terminals except GND terminal do not fall below GND voltage including transient characteristics. However, it is possible that the motor output terminal may deflect below GND because of influence by back electromotive force of motor. Malfunction may possibly occur depending on use condition, environment, and property of individual motor. Please make fully confirmation that no problem is found on operation of IC. 5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation(Pd) in actual operating conditions. 6) Inter-pin shorts and mounting errors Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 7) Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 8) ASO When using the IC, set the output transistor so that it does not exceed absolute maximum rations or ASO. 9) Thermal shut down circuit The IC incorporates a built-in thermal shutdown circuit (TSD circuit). Operation temperature is 175(typ.) and has a hysteresis width of 25(typ.). When IC chip temperature rises and TSD circuit works, the output terminal becomes an open state. TSD circuit is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after operation this circuit or use the IC in an environment where the operation of this circuit is assumed. 10) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC. 11) GND wiring pattern When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. 12) Capacitor between output and GND When a large capacitor is connected between output and GND, if Vcc is shorted with 0V or GND for some cause, it is possible that the current charged in the capacitor may flow into the output resulting in destruction. Keep the capacitor between output and GND below 100uF. 13) IC terminal input When Vcc voltage is not applied to IC, do not apply voltage to each input terminal. When voltage above Vcc or below GND is applied to the input terminal, parasitic element is actuated due to the structure of IC. Operation of parasitic element causes mutual interference between circuits, resulting in malfunction as well as destruction in the last. Do not use in a manner where parasitic element is actuated.
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Appendix
Notes
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Appendix-Rev4.0

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